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E2B0027-27-Y2 Semiconductor Semiconductor MSM5238 32-DOT LCD COMMON DRIVER This version: Nov. 1997 MSM5238 Previous version: Mar. 1996 GENERAL DESCRIPTION The MSM5238 is a dot matrix LCD common driver LSI which is fabricated using low power CMOS metal gate technology. The scanning signal in one matrix display frame can be divided into up to 1/32 duty. This LSI consists of 32-bit shift register, 32-bit level shifter and 32-bit 4-level driver. This LSI can drive a variety of LCD panels because the bias voltage, which determines the LCD driving voltage, can be optionally supplied from an external source. FEATURES * Supply voltage : 3 to 7V * LCD driving voltage : 3 to 16V * Applicable LCD duty : 1/32 to 1/64 (1/64 duty is available when MSM5238s are cascade-connected) * Bias voltage can be supplied externally. * Applicable segment driver: MSM5839B/C (40 outputs) * Package options: 44-pin plastic QFP (QFP44-P-910-0.80-K) (Product name: MSM5238GS-K) 44-pin plastic QFP (QFP44-P-910-0.80-L2) (Product name: MSM5238GS-L2) 44-pin plastic QFP (QFP44-P-910-0.80-2K) (Product name: MSM5238GS-2K) 1/12 Semiconductor MSM5238 BLOCK DIAGRAM O1 VDD V1 V2 V3 VEE(V4) O32 32-Bit 4-Level Driver VDD VEE 32-Bit Level Shifter VDD DF VSS DI CP 32-Bit Shift Register VSS DO 2/12 Semiconductor MSM5238 PIN CONFIGURATION (TOP VIEW) 39 VDD 40 VSS (Top view) 43 NC 41 CP 42 DF 44 DI 35 VEE(V4) O1 O2 O3 O4 O5 O6 O7 O8 O9 O10 O11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 34 DO 38 V1 37 V2 36 V3 33 32 31 30 29 28 27 26 25 24 23 O32 O31 O30 O29 O28 O27 O26 O25 O24 O23 O22 *(VDD) O12 O13 O14 O15 O16 O17 O18 O19 O20 NC: No connection 44-Pin Plastic QFP (Type K) 10 O10 11 O11 12 13 14 15 16 17 18 19 20 21 22 O1 O2 O3 O4 O5 O6 O7 O8 1 2 3 4 5 6 7 8 DI NC DF CP VSS VDD V1 V2 V3 VEE(V4) DO 44 43 42 41 40 39 38 37 36 35 34 9 O9 O21 O12 O13 O14 O15 O16 *(VDD) O17 O18 O19 O20 O21 33 32 31 30 29 28 27 26 25 24 O23 O32 O31 O30 O29 O28 O27 O26 O25 O24 NC: No connection 44-Pin Plastic QFP (Type L) * Pin 17 is an auxiliary pin. It must be connected to the power supply or left open. Note : The figure for Type L shows the configuration viewed from the reverse side of the package. Pay attention to the difference in pin arrangement. 3/12 O22 23 Semiconductor MSM5238 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Supply Voltage Input Voltage Storage Temperature Symbol VDD VLCD VI TSTG Condition Ta = 25C Ta = 25C, VDD-VEE Ta = 25C -- Rating -0.3 to +7 0 to 16.5 -0.3 to VDD -55 to +150 Unit V V V C RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage Supply Voltage Operating Temperature Fan-Out Symbol VDD VLCD Top N Condition -- VDD-VEE * -- MOS load Range 3 to 7 3 to 16 -40 to +85 5 Unit V V C -- * VDD V1 V2 V3 VEE (V4) 4/12 Semiconductor MSM5238 ELECTRICAL CHARACTERISTICS DC Characteristics Parameter Symbol VDD (V) 5 7 5 7 VSS (V) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -- VEE (V) 0 to -9 0 to -7 0 to -9 0 to -7 -7 -7 0 to -9 0 to -7 0 to -9 0 to -7 0 -5 0 -7 0 -5 0 -7 -9 -7 -9 -7 -- Condition Min. Typ. Max. Unit "H" Input Voltage VIH1/VIH2 *1 -- -- -- -- VI = 7V VI = 0V IO = -40mA IO = -56mA IO = 0.2mA IO = 0.3mA VO: DRV output VO - V1 = 0.25V V1 = VEE to (VDD - 0.25V) VO - V4 = 0.25V V4 (VEE): 0V MAX VN = V2 or V3 VO = DRV output VO - VN = 0.25V VN = VEE to (VDD - 0.25V) -- -- -- -- -- 3.6/4.2 5.2/6.0 -- -- -- -- 4.2 5.8 -- -- -- -- -- -- -- -- -- -- -- -- -- -- - -- -- -- -- -- -- -- -- -- -- 500 250 350 200 800 450 550 350 -- -- -- -- 5 -- V -- 0.8/0.4 V 1.1/0.5 1 -1 -- V -- 0.4 V 0.4 2000 1000 1400 800 3200 1800 2200 1400 5 5 0.5 1.0 -- pF mA mA W W mA "L" Input Voltage *1 VIL1/VIL2 IIH IIL Input Current 7 7 5 "H" Output Voltage VOH *2 7 5 "L" Output Voltage VOL *2 7 5 RON (V1, VEE(V4)) 7 ON Resistance 5 RON (V2, V3) 7 5 7 OFF Leakage Current Supply Current Input Capacitance IOFF IDD CI 5 7 -- *1 VIH1 and VIL1 are input pins for DI and DF, while VIH2 and VIL2 are input pins for CP. *2 VOH and VOL are output pins for DO. 5/12 Semiconductor Switching Characteristics Parameter Clock Frequency Clock Pulse Width Data Setup Time (DATAIN CP) Data Hold Time (DATAIN CP) Clock Pulse Rise/Fall Time Symbol f (cp) tw (cp) tSETUP tHOLD tr (cp) tf (cp) VDD (V) 5 7 5 7 5 7 5 7 5 7 Condition -- -- -- -- -- -- -- -- -- -- Min. -- -- 400 300 100 50 800 500 -- -- Typ. -- -- -- -- -- -- -- -- -- -- MSM5238 Max. 400 550 -- -- -- -- -- -- 0.5 0.1 Unit kHz ns ns ns ms tr (cp) 90% 10% 90% 50% tf (cp) CP 50% 10% tw (cp) 50% tSETUP tHOLD DI 50% 50% 6/12 Semiconductor MSM5238 FUNCTIONAL DESCRIPTION Pin Functional Description * DI Shift register data input pin which inputs the data on scanning lines in synchronization with a clock (positive logic). This LSI can optionally divide the scanning signal up to 1/32 duty LCD panel because it consists of the 32-bit shift register. * CP Clock pulse input pin for the 32-bit shift register. The data is shifted to the 32-bit shift register at the falling edge of the clock pulse. A data set up time (tSETUP) and data hold time (tHOLD) are required between DI and CP. (Refer to Switching Characteristics.) A Schmitt circuit is included in the CP input circuit. * DF Synchronous signal input pin for alternate signal for LCD driving. * VDD, VSS VDD is a power supply pin, which is normally from 3.0V to 7.0V. VSS is a ground pin, which is 0V. * O1 - O32 Display data output pins which correspond to each data bit in the latch. One of V1, V2, V3 and VEE (V4) is selected as a display driving voltage source based on the combination of latched data level and DF signal. Refer to the Truth Table. O1 - O32 are connected to the common side of the LCD panel. 7/12 Semiconductor MSM5238 * V1, V2, V3, VEE (V4) Bias supply voltage pins to drive the LCD. Use an external bias voltage supply for driving the LCD. * DO Shift register output pin. The data which was input from DI is output from DO with 32 bits delay, synchronized with the clock pulse. The MSM5238 is used at 1/32 duty and also at 1/64 duty through cascade connection. Refer to Figure 1 below. 32 64 n LCD panel 32 Frame signal Clock DI O1 DF CP O32 DO DI O1 DF CP O32 DO MSM5238 VDD V1 V2 V3 VEE(V4) Vss MSM5238 VDD V1 V2 V3 VEE(V4) Vss GND DF +5V Bias Circuit -V Figure 1 Truth Table Latched data L DF L H LCD driver output V2 V4 V3 V1 H L H 8/12 Semiconductor MSM5238 NOTES ON USE Note the following when turning power on and off: The LCD drivers of this IC require a high voltage. For this reason, if a high voltage is applied to the LCD drivers with the logic power supply floating, excess current flows. This may damage the IC. Be sure to carry out the following power-on and power-off sequences: When turning power on: First VDD ON, next VEE (V4), V3, V2, V1 ON. Or both ON at the same time. When turning power off: First VEE (V4), V3, V2, V1 OFF, next VDD OFF. Or both OFF at the same time. 9/12 Semiconductor MSM5238 PACKAGE DIMENSIONS (Unit : mm) QFP44-P-910-0.80-K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.35 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 10/12 Semiconductor MSM5238 (Unit : mm) QFP44-P-910-0.80-L2 Spherical surface Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.35 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 11/12 Semiconductor MSM5238 (Unit : mm) QFP44-P-910-0.80-2K Mirror finish Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin 42 alloy Solder plating 5 mm or more 0.41 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 12/12 |
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